Integrated Circuits (ICs) > Logic ICs > Counters > Texas-Instruments-CD4033BPWRE4

Texas Instruments CD4033BPWRE4

Texas Instruments

Part Number:	Texas Instruments CD4033BPWRE4
Manufacturer:	Texas Instruments
Part Type:	Integrated Circuits (ICs) > Logic ICs > Counters > Texas-Instruments-CD4033BPWRE4
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Description:	Logic - Counters CMOS Decade Counter/ Divider

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Logic - Counters CMOS Decade Counter/ Divider

Specifications

TYPE	DESCRIPTION
Case/Package	TSSOP
Mount	Surface Mount
Number of Pins	16
Clock Edge Trigger Type	Positive Edge
Direction	Up
Logic Function	Counter
Max Operating Temperature	125 °C
Min Operating Temperature	-55 °C
Number of Bits	7
Number of Bits per Element	5
Number of Elements	1
Operating Supply Voltage	18 V
Packaging	Tape & Reel (TR)
Reset	Asynchronous
Sync/Async	Synchronous

Documentation for Texas Instruments Texas Instruments CD4033BPWRE4

Datasheet

View & Download Texas-Instruments-CD4033BPWRE4 Datasheet

Alternate Descriptions

Descriptions of Texas Instruments CD4033BPWRE4 provided by its distributors.
Logic - Counters CMOS Decade Counter/ Divider
Display Driver Counter, 4000/14000/40000 Series, Synchronous, Positive Edge Triggered, 5-Bit, Up Direction, CMOS, PDSO16
CD4026B and CD4033B each consist of a 5-stage Johnson decade counter and an output decoder which converts the Johnson code to a 7-segment decoded output for driving one stage in a numerical display. These devices are particularly advantageous in display applications where low power dissipation and /or low package count are important. Inputs common to both types are CLOCK, RESET, & CLOCK INHIBIT; common outputs are CARRY OUT and the seven decoded outputs (a, b, c, d, e, f, g). Additional inputs and outputs for the CD4026B include DISPLAY ENABLE input and DISPLAY ENABLE and UNGATED "C-SEGMENT" outputs. Signals peculiar to the CD4033B are RIPPLE-BLANKING INPUT AND LAMP TEST INPUT and a RIPPLE-BLANKING OUTPUT. A high RESET signal clears the decade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. The CLOCK INHIBIT signal can be used as a negative-edge clock if the clock line is held high. Antilock gating is provided on the JOHNSON counter, thus assuring proper counting sequence. The CARRY-OUT (Cout) signal completes one cycle every ten CLOCK INPUT cycles and is used to clock the succeeding decade directly in a multi-decade counting chain. The seven decoded outputs (a, b, c, d, e, f, g) illuminate the proper segments in a seven segment display device used for representing the decimal numbers 0 to 9. The 7-segment outputs go high on selection in the CD4033B; in the CD4026B these outputs go high only when the DISPLAY ENABLE IN is high. The CD4026B- and CD4033B-series types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

Texas Instruments CD4033BPWRE4

Texas Instruments

Specifications

Documentation for Texas Instruments Texas Instruments CD4033BPWRE4

Alternate Descriptions

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