TPIC6596DW

Texas Instruments

Part Number:	TPIC6596DW
Manufacturer:	Texas Instruments
Part Type:	Integrated Circuits (ICs) > TPIC6596DW
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Description:	Shift Register Single 8-Bit Serial to Serial/Parallel 20-Pin SOIC Tube

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Shift Register Single 8-Bit Serial to Serial/Parallel 20-Pin SOIC Tube

Specifications

TYPE	DESCRIPTION
Case/Package	SOIC
Mount	Surface Mount
Number of Pins	20
Weight	537.308512 mg
Direction	Unidirectional
Logic Function	Shift Register
Max Operating Temperature	125 °C
Max Supply Voltage	5.5 V
Min Operating Temperature	-40 °C
Min Supply Voltage	4.5 V
Number of Bits	8
Number of Circuits	1
Number of Elements	1
Number of Input Lines	1
Number of Output Lines	9
Number of Outputs	8
Operating Supply Voltage	5 V
Output Voltage	45 V
Packaging	Rail/Tube
Propagation Delay	650 ns
Turn-On Delay Time	650 ns

Images

Documentation for Texas Instruments TPIC6596DW

Datasheet	View & Download TPIC6596DW Datasheet
Datasheet	View & Download TPIC6596DW Datasheet
Datasheet	View & Download TPIC6596DW Datasheet

Alternate Descriptions

Descriptions of Texas Instruments TPIC6596DW provided by its distributors.
Shift Register Single 8-Bit Serial to Serial/Parallel 20-Pin SOIC Tube
Register Logic IC; Shift Register Function:Serial-In / Parallel-Out; No. of Elements:1; Output Type:Standard; Logic Case Style:SOIC; No. of Pins:20; Supply Voltage Range:4.5V to 5.5V; Operating Temperature Range:-40°C to +125°C ;RoHS Compliant: No
The TPIC6596 is a monolithic, high-voltage, high-current power 8-bit shift register designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK) respectively. The storage register transfers data to the output buffer when shift-register clear (SRCLR)\ is high. When SRCLR\ is low, all registers in the device are cleared. When output enable (G)\ is held high, all data in the output buffers is held low and all drain outputs are off. When G\ is held low, data from the storage register is transparent to the output buffers. The serial output (SER OUT) is clocked out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This will provide improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference. Outputs are low-side, open-drain DMOS transistors with output ratings of 45 V and 250-mA continuous sink current capability. When data in the output buffers is low, the DMOS-transistor outputs are off. When data is high, the DMOS-transistor outputs have sink current capability. Separate power and logic level ground pins are provided to facilitate maximum system flexibility. Pins 1, 10, 11, and 20 are internally connected, and each pin must be externally connected to the power system ground in order to minimize parasitic inductance. A single-point connection between pin 19, logic ground (LGND), and pins 1, 10, 11, and 20, power grounds (PGND), must be externally made in a manner that reduces crosstalk between the logic and load circuits. The TPIC6596 is characterized for operation over the operating case temperature range of -40C to 125C.

TPIC6596DW

Texas Instruments

Specifications

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Documentation for Texas Instruments TPIC6596DW

Alternate Descriptions

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