Integrated Circuits (ICs) > Logic ICs > Latches and Flip Flops > SN74LVTH574PWR

SN74LVTH574PWR

Texas Instruments

Part Number:	SN74LVTH574PWR
Manufacturer:	Texas Instruments
Part Type:	Integrated Circuits (ICs) > Logic ICs > Latches and Flip Flops > SN74LVTH574PWR
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Description:	Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin TSSOP T/R

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04/24/2026 – There are 515 pieces pieces of Part Number SN74LVTH574PWR Available.

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Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin TSSOP T/R

Specifications

TYPE	DESCRIPTION
Case/Package	TSSOP
Mount	Surface Mount
Number of Pins	20
Weight	76.997305 mg
Clock Edge Trigger Type	Positive Edge
Frequency	150 MHz
High Level Output Current	-32 mA
Logic Function	D-Type, Flip-Flop
Low Level Output Current	64 mA
Max Frequency	150 MHz
Max Operating Temperature	85 °C
Max Supply Voltage	3.6 V
Min Operating Temperature	-40 °C
Min Supply Voltage	2.7 V
Number of Bits	8
Number of Bits per Element	8
Number of Circuits	8
Number of Elements	1
Number of Input Lines	1
Number of Output Lines	3
Operating Supply Voltage	3.3 V
Output Current	64 mA
Output Type	TTL
Packaging	Tape and Reel
Polarity	Non-Inverting
Propagation Delay	5.9 ns
Schedule B	8542390000
Turn-On Delay Time	3 ns
Height	0 m
Length	6.5 mm
Thickness	1 mm
Width	4.4 mm

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Documentation for Texas Instruments SN74LVTH574PWR

Technical Drawing	View & Download SN74LVTH574PWR Technical Drawing
Datasheet	View & Download SN74LVTH574PWR Datasheet
Datasheet	View & Download SN74LVTH574PWR Datasheet
Technical Drawing	View & Download SN74LVTH574PWR Technical Drawing
Datasheet	View & Download SN74LVTH574PWR Datasheet
Datasheet	View & Download SN74LVTH574PWR Datasheet
Datasheet	View & Download SN74LVTH574PWR Datasheet
Datasheet	View & Download SN74LVTH574PWR Datasheet
Datasheet	View & Download SN74LVTH574PWR Datasheet
Datasheet	View & Download SN74LVTH574PWR Datasheet
Datasheet	View & Download SN74LVTH574PWR Datasheet
Datasheet	View & Download SN74LVTH574PWR Datasheet
Datasheet	View & Download SN74LVTH574PWR Datasheet

Alternate Descriptions

Descriptions of Texas Instruments SN74LVTH574PWR provided by its distributors.
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin TSSOP T/R
3.3-V ABT Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-TSSOP -40 to 85
Flip-Flop Logic IC; Logic Family:LVT; Supply Voltage Min:2.7V; Supply Voltage Max:3.6V; Package/Case:20-TSSOP; No. of Pins:20; Operating Temperature Range:-40°C to +85°C; Input Type:TTL/CMOS; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
These octal flip-flops are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. The eight flip-flops of the LVTH574 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

SN74LVTH574PWR

Texas Instruments

Specifications

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Documentation for Texas Instruments SN74LVTH574PWR

Alternate Descriptions

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