Integrated Circuits (ICs) > Logic ICs > Counters > CD4018BPWRG4

CD4018BPWRG4

Texas Instruments

Part Number:	CD4018BPWRG4
Manufacturer:	Texas Instruments
Part Type:	Integrated Circuits (ICs) > Logic ICs > Counters > CD4018BPWRG4
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Description:	Counter ICs CMOS Presettable Divide-By-N Counter

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04/22/2026 – There are 515 pieces pieces of Part Number CD4018BPWRG4 Available.

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Counter ICs CMOS Presettable Divide-By-N Counter

Specifications

TYPE	DESCRIPTION
Case/Package	TSSOP
Mount	Surface Mount
Number of Pins	16
Clock Edge Trigger Type	Positive Edge
Frequency	17 MHz
Max Operating Temperature	125 °C
Min Operating Temperature	-55 °C
Number of Bits	5
Number of Bits per Element	5
Number of Elements	1
Operating Supply Voltage	18 V
Packaging	Tape & Reel (TR)
Reset	Asynchronous
Sync/Async	Synchronous
Case/Package	TSSOP
Mount	Surface Mount
Number of Pins	16
Clock Edge Trigger Type	Positive Edge
Frequency	17 MHz
Max Operating Temperature	125 °C
Min Operating Temperature	-55 °C
Number of Bits	5
Number of Bits per Element	5
Number of Elements	1
Operating Supply Voltage	18 V
Packaging	Tape & Reel (TR)
Reset	Asynchronous
Sync/Async	Synchronous

Documentation for Texas Instruments CD4018BPWRG4

Datasheet	View & Download CD4018BPWRG4 Datasheet
Datasheet	View & Download CD4018BPWRG4 Datasheet

Alternate Descriptions

Descriptions of Texas Instruments CD4018BPWRG4 provided by its distributors.
Counter ICs CMOS Presettable Divide-By-N Counter
Counter Logic IC; Logic Family:CD4000; Supply Voltage Min:3V; Supply Voltage Max:18V; Package/Case:16-TSSOP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; Input Type:CMOS; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
CD4018B types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. CLOCK, RESET, DATA, PRESET ENABLE, and 5 individual JAM inputs are provided. Divide by 10, 8, 6, 4, or 2 counter configurations can be implemented by feeding the Q\5, Q\4, Q\3, Q\2, Q\1 signals, respectively, back to the DATA input. Divide-by-9, 7, 5, or 3 counter configurations can be implemented by the use of a CD4011B to gate the feedback connection to the DATA input. Divide-by functions grater than 10 can be achieved by use of multiple CD4018B units. The counter is advanced one count at the positive clock-signal transition.. Schmitt Trigger action on the clock line permits unlimited clock rise and fall times. A high RESET signal clear the counter to an all-zero condition. A high PRESET-ENABLE signal allows information on the JAM inputs to preset the counter. Anti-lock gating is provided to assure the proper counting sequence. The CD4018B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
Descriptions of Texas Instruments CD4018BPWRG4 provided by its distributors.
Counter ICs CMOS Presettable Divide-By-N Counter
Counter Logic IC; Logic Family:CD4000; Supply Voltage Min:3V; Supply Voltage Max:18V; Package/Case:16-TSSOP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; Input Type:CMOS; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
CD4018B types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. CLOCK, RESET, DATA, PRESET ENABLE, and 5 individual JAM inputs are provided. Divide by 10, 8, 6, 4, or 2 counter configurations can be implemented by feeding the Q\5, Q\4, Q\3, Q\2, Q\1 signals, respectively, back to the DATA input. Divide-by-9, 7, 5, or 3 counter configurations can be implemented by the use of a CD4011B to gate the feedback connection to the DATA input. Divide-by functions grater than 10 can be achieved by use of multiple CD4018B units. The counter is advanced one count at the positive clock-signal transition.. Schmitt Trigger action on the clock line permits unlimited clock rise and fall times. A high RESET signal clear the counter to an all-zero condition. A high PRESET-ENABLE signal allows information on the JAM inputs to preset the counter. Anti-lock gating is provided to assure the proper counting sequence. The CD4018B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4018BPWRG4

Texas Instruments

Specifications

Documentation for Texas Instruments CD4018BPWRG4

Alternate Descriptions

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